MBX 269 SVE151 E - Quanta HK5 HK6 - REV 1A PDF.pdf

(1157 KB) Pobierz
A
B
C
D
E
Page
01
02
03
04
4
Title of schematic page
Page List
Block Diagram
Change List
SNB 1/4(HOST&PCIE)
SNB 2/4(DDR3 I/F)
SNB 3/4(POWER)
SNB 4/4(GND/Strap)
PCH 1/6(DMI/FDI/VIDEO)
PCH 2/6(SATA/RTC/HDA/LPC)
PCH 3/6(PCIE/USB/CLK/NV)
PCH 4/6(GPIO/CPU/STRAP)
PCH 5/6(POWER)
PCH 6/6 (GND)
DDR3 DIMM-0-STD
DDR3 DIMM-1-STD
WPCE791L & FLASH
CRT/LVDS/CAMERA
CARD READER(RTS5209)
HDMI/THERMAL
USB
LAN (RTL8111F)
WLAN/KB-BL
HDD/ODD/G-SENSOR/TP/FAN
Audio ALC258-GR
LED/RF/PS
POWER +VCC_CORE (ISL95835)
POWER 3VPCU&RVCC5(PM6686)
POWER 1.5VSUS/VTT_MEM
POWER +1.05V(G5602R41U)-15A
POWER VCCSA/VCCIO
POWER VCC1.8/Thermal
POWER(BAT IN / ADA IN/ UL)
POWER CHARGER (ISL88731C)
POWER VGA_CORE( OZ8117)
POWER VGA_VCC1.8/VCC1.0
Thames_PCIE I/F/DP Power
Thames_IO & STRAP
Thames_MEMORY/THERM
Thames_POWER
Rev.
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
Date
Page
40
41
42
43
Title of schematic page
Thames_DDR3_A_512M
Thames_DDR3_B_512M
HOLE/EMI/KB
IO PORT LIST
Rev.
1A
1A
1A
1A
Date
1
4
05
06
07
08
09
10
11
12
13
14
3
* : No mount
E@ : For DIS GFX only
I@ : For INT GFX only
15
16
17
18
19
20
21
22
23
24
3
2
25
26
27
28
29
30
31
32
33
34
35
2
1
1
36
37
38
39
1A
1A
1A
1A
A
B
C
D
E
5
4
3
2
1
ZS/HK5 Chief River BLOCK DIAGRAM
02
D
intel
D
DDR3 : 1.5V
DDR
SYSTEM
MEMORY
Ivy Bridge
Dual Channel
PCI-E
X16
PCIE2
5GT/s
AMD
Thames-Pro
Package type
：
GB1b-128
VRAM
1GB / 2GB
P36 ~ P39
P40 ~ P41
P14~P15
DDR3 : 1066/1333/1600 MHz
rPGA 988
DMI
(37.5mm X 37.5mm)
VRAM
1GB / 2GB
FDI
P40 ~ P41
P4~P7
FDI
X8
Camera
PORT10
P21
C
DMI
X4
5GT/s
P17
2.7GT/s
FDI
INT_CRT
P17
iGFX
Interfaces
DMI
HDD
SATA0
6Gb/s
SATA Gen3
intel
<PCH>
INT_LVDS
C
WiMax/BT
PORT12
P21
P21
P20
P20
P20
P20
ODD
SATA3
3Gb/s
P17
SATA Gen2
USB I/O
PORT3
INT_HDMI
P19
USB I/O
PORT1
PCIE6
USB I/O
PORT0
USB 3.0
mBGA 989
(25mm X 25mm)
Giga-LAN
PCIE1
PORT2
5GT/s
PCI-Express Gen2
Card Reader
P21
RTS5209
P18
B
Audio CODEC
B
Azalia
HDA
SPI
P8~P13
RTL8111F
RJ45
ALC258-GR
P24
PCIE4
USB I/O
USB 2.0
Panther Point
USB
LPC
WLAN/Widi/BT
P21
BT Combo : Atheros WB195
WiMAX : Kelsey Peak KSP(612BNXHWG)
802.11bgn/Intel/KsP_1x2_BBY
MIC Jack
HP Jack
SPI ROM
8MB
DMIC
SPK
P9
P21
Power LED
Button
QWA#
VAIO#
ASSIST#
Power SW
A
EC
NPCE885L
P24
A
Sleep LED
SATA LED
P24
Battery LED
RF LED
SCROLED
P24
P24
Touch Pad
P20
Keyboard
P25
Note:
HM65 does not support USB 6 & 7
HM65 does not support SATA 2 & 3
5
4
3
CAPSLED
P16
NUMLED
CARD LED
2
1
SD-XC
MS
5
4
3
2
1
Change List
HK5_MB_SCH_PVT_001
P21--Add LQ2[CHT2301PT],LR18[47K],LC27[0.01UF],LC26[1U].
P21--No mount LR15[0 ohm].
P21--LR16 pin1 connect to "+3V_S5".
Reason : Modify circuit for LAN power Rise time.
Possible Risk: No.
D
HK5_MB_SCH_PVT_011
P25-- change R225 form 150ohm to 40.2ohm
Reason : for W/L LED dark
Possible Risk: No.
issue
03
issue
D
HK5_MB_SCH_PVT_012
P25-- change R224 R226 R349 form 150ohm to 75ohm
Reason : for HDD ,Battery and card reader LED dark
Possible Risk: No.
HK5_MB_SCH_PVT_013
P23-- add R461 ,R462 [0ohm]
Reason : customer requirement for TP SMBUS signal
Possible Risk: No.
HK5_MB_SCH_PVT_002
P22--Delete R409[3.01K].
P22--U29 value change to "G5240/TPS2051".
Reason : Modify circuit for K/B Backlight protect.
Possible Risk: No.
HK5_MB_SCH_PVT_003
P4--Delete R332[0 ohm].
P5--Delete R171[0 ohm].
P6--Delete R189,R186,R197[0 ohm].
P8--Delete R438,R38,R37,R439[0 ohm].
P9--Delete R121,R67,R65,R122[0 ohm].
P10--Delete R73[0 ohm].
P12--Delete R102,R126,R299,R302[0 ohm]
P14--Delete R312[0 ohm]
P15--Delete R309[0 ohm]
P16--Delete KR39,KR60,KR6,KR30[0 ohm]
P18--Delete ML1,MR5[0 ohm]
P21--Delete LR12[0 ohm]
P22--Delete R96[0 ohm]
P23--Delete R461 ,R462
[0 ohm]
P24--Delete AL1,AR21,AR8,AR23,AR24,AR25,AR22,AR15,AR16,AR17,AL3,AL4,R418,AR20[0 ohm]
P27--Delete PR490,PR502[0 ohm]
P31--Delete PR504[0 ohm]
Reason : Cancel 0 ohm.
Possible Risk: No.
HK5_MB_SCH_PVT_004
P27--Delete PR513.
Reason : Cancel 0 ohm.
Possible Risk: No.
HK5_MB_SCH_PVT_005
P26--PR100,PR108,PR109 change to short PAD.
P27--PR325,PR318,PR324,PR326 change to short PAD.
P28--PR352,PR356,PR360,PR357,PR358 change to short PAD.
P30--PR388,PR390,PR392 change to short PAD.
P31--PR413,PR429,PR430,PR440,PR441 change to short PAD.
P33--PR271 change to short PAD.
C
C
B
Reason : Cancel 0 ohm.
Possible Risk: No.
HK5_MB_SCH_PVT_006
P23--reserve D9 and D10
Reason : reserve ESD diode
Possible Risk: No.
HK5_MB_SCH_PVT_007
P25--change CON1 form 12Pin to 10pin
Reason : delete samll board LID fuction
Possible Risk: No.
HK5_MB_SCH_PVT_008
P42-- Del J5,J6,J7,J8,J9,J10 for EMI request
Reason : For EMI
Possible Risk:
No.
HK5_MB_SCH_PVT_009
P23-- Delete reserve ESD diode D23 ,D24
B
A
Reason : ESD test PASS , we don't need to reserve
Possible Risk: No.
HK5_MB_SCH_PVT_010
P23-- change ODD ESD diode form Rclamp0502n to SR05
Reason : for SMT issue , Rclamp0502n easy to short , we change to SR05 and still
reserve it
Possible Risk: No.
Size
Date:
5
4
3
2
A
Quanta Computer Inc.
PROJECT :Chief River
Document Number
Rev
1A
Sheet
3
of
43
Change List
Wednesday, February 01, 2012
1
5
4
3
2
1
Ivy Bridge Processor (DMI,PEG,FDI)
U17A
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]
PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
J22
J21
H22
K33
M35
L34
J35
J32
H34
H31
G33
G30
F35
E34
E32
D33
D31
B33
C32
J33
L35
K34
H35
H32
G34
G31
F33
F30
E35
E33
F32
D34
E31
C33
B32
M29
M32
M31
L32
L29
K31
K28
J30
J28
H29
G27
E29
F27
D28
F26
E25
M28
M33
M30
L31
L28
K30
K27
J29
J27
H28
G28
E28
F28
D27
E26
D25
PEG_COMP
R175
24.9/F_4
+1.05V
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
B27
B25
A25
B24
B28
B26
A24
B23
G21
E22
F21
D21
G22
D22
F20
C21
DMI_RX#[0]
DMI_RX#[1]
DMI_RX#[2]
DMI_RX#[3]
DMI_RX[0]
DMI_RX[1]
DMI_RX[2]
DMI_RX[3]
DMI_TX#[0]
DMI_TX#[1]
DMI_TX#[2]
DMI_TX#[3]
DMI_TX[0]
DMI_TX[1]
DMI_TX[2]
DMI_TX[3]
Ivy Bridge Processor (CLK,MISC,JTAG)
U17B
04
+1.05V
D
MISC
(9) H_SNB_IVB#
PEG_RXN15 (36)
PEG_RXN14 (36)
PEG_RXN13 (36)
PEG_RXN12 (36)
PEG_RXN11 (36)
PEG_RXN10 (36)
PEG_RXN9 (36)
PEG_RXN8 (36)
PEG_RXN7 (36)
PEG_RXN6 (36)
PEG_RXN5 (36)
PEG_RXN4 (36)
PEG_RXN3 (36)
PEG_RXN2 (36)
PEG_RXN1 (36)
PEG_RXN0 (36)
PEG_RXP15 (36)
PEG_RXP14 (36)
PEG_RXP13 (36)
PEG_RXP12 (36)
PEG_RXP11 (36)
PEG_RXP10 (36)
PEG_RXP9 (36)
PEG_RXP8 (36)
PEG_RXP7 (36)
PEG_RXP6 (36)
PEG_RXP5 (36)
PEG_RXP4 (36)
PEG_RXP3 (36)
PEG_RXP2 (36)
PEG_RXP1 (36)
PEG_RXP0 (36)
PEG_TXN15_C
PEG_TXN14_C
PEG_TXN13_C
PEG_TXN12_C
PEG_TXN11_C
PEG_TXN10_C
PEG_TXN9_C
PEG_TXN8_C
PEG_TXN7_C
PEG_TXN6_C
PEG_TXN5_C
PEG_TXN4_C
PEG_TXN3_C
PEG_TXN2_C
PEG_TXN1_C
PEG_TXN0_C
PEG_TXP15_C
PEG_TXP14_C
PEG_TXP13_C
PEG_TXP12_C
PEG_TXP11_C
PEG_TXP10_C
PEG_TXP9_C
PEG_TXP8_C
PEG_TXP7_C
PEG_TXP6_C
PEG_TXP5_C
PEG_TXP4_C
PEG_TXP3_C
PEG_TXP2_C
PEG_TXP1_C
PEG_TXP0_C
C209
C201
C194
C187
C182
C179
C174
C171
C169
C167
C162
C157
C155
C153
C150
C148
C202
C197
C188
C183
C180
C175
C172
C170
C168
C163
C159
C156
C154
C151
C149
C147
E@0.1U/10V/X5R_4
E@0.1U/10V/X5R_4
E@0.1U/10V/X5R_4
E@0.1U/10V/X5R_4
E@0.1U/10V/X5R_4
E@0.1U/10V/X5R_4
E@0.1U/10V/X5R_4
E@0.1U/10V/X5R_4
E@0.1U/10V/X5R_4
E@0.1U/10V/X5R_4
E@0.1U/10V/X5R_4
E@0.1U/10V/X5R_4
E@0.1U/10V/X5R_4
E@0.1U/10V/X5R_4
E@0.1U/10V/X5R_4
E@0.1U/10V/X5R_4
E@0.1U/10V/X5R_4
E@0.1U/10V/X5R_4
E@0.1U/10V/X5R_4
E@0.1U/10V/X5R_4
E@0.1U/10V/X5R_4
E@0.1U/10V/X5R_4
E@0.1U/10V/X5R_4
E@0.1U/10V/X5R_4
E@0.1U/10V/X5R_4
E@0.1U/10V/X5R_4
E@0.1U/10V/X5R_4
E@0.1U/10V/X5R_4
E@0.1U/10V/X5R_4
E@0.1U/10V/X5R_4
E@0.1U/10V/X5R_4
E@0.1U/10V/X5R_4
PEG_TXN15 (36)
PEG_TXN14 (36)
PEG_TXN13 (36)
PEG_TXN12 (36)
PEG_TXN11 (36)
PEG_TXN10 (36)
PEG_TXN9 (36)
PEG_TXN8 (36)
PEG_TXN7 (36)
PEG_TXN6 (36)
PEG_TXN5 (36)
PEG_TXN4 (36)
PEG_TXN3 (36)
PEG_TXN2 (36)
PEG_TXN1 (36)
PEG_TXN0 (36)
PEG_TXP15 (36)
PEG_TXP14 (36)
PEG_TXP13 (36)
PEG_TXP12 (36)
PEG_TXP11 (36)
PEG_TXP10 (36)
PEG_TXP9 (36)
PEG_TXP8 (36)
PEG_TXP7 (36)
PEG_TXP6 (36)
PEG_TXP5 (36)
PEG_TXP4 (36)
PEG_TXP3 (36)
PEG_TXP2 (36)
PEG_TXP1 (36)
PEG_TXP0 (36)
TP15
SKTOCC#
C26
AN34
PROC_SELECT#
SKTOCC#
CLOCKS
BCLK
BCLK#
A28
A27
CLK_CPU_BCLKP (10)
CLK_CPU_BCLKN (10)
D
DMI
DPLL_REF_CLK
DPLL_REF_CLK#
A16
A15
R329
R330
1K_4
1K_4
TP14
TP_CATERR#
AL33
CATERR#
(16) EC_PECI
AN33
THERMAL
PECI
SM_DRAMRST#
R8
CPU_DRAMRST# (5)
PCI EXPRESS* - GRAPHICS
H_PROCHOT#
R190
56/J_4
H_PROCHOT#_R
DDR3
MISC
AL32
PROCHOT#
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
AK1
A5
A4
SM_RCOMP_0
R185
SM_RCOMP_1
R324
SM_RCOMP_2
R325
140/F_4
25.5/F_4
200/F_4
(7,11) PM_THRMTRIP#
AN32
THERMTRIP#
Intel(R) FDI
PWR MANAGEMENT
JTAG & BPM
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
FDI_TXN0
FDI_TXN1
FDI_TXN2
FDI_TXN3
FDI_TXN4
FDI_TXN5
FDI_TXN6
FDI_TXN7
FDI_TXP0
FDI_TXP1
FDI_TXP2
FDI_TXP3
FDI_TXP4
FDI_TXP5
FDI_TXP6
FDI_TXP7
A21
H19
E19
F18
B21
C20
D18
E17
A22
G19
E20
G18
B20
C19
D19
F17
J18
J17
H20
J19
H17
FDI0_TX#[0]
FDI0_TX#[1]
FDI0_TX#[2]
FDI0_TX#[3]
FDI1_TX#[0]
FDI1_TX#[1]
FDI1_TX#[2]
FDI1_TX#[3]
FDI0_TX[0]
FDI0_TX[1]
FDI0_TX[2]
FDI0_TX[3]
FDI1_TX[0]
FDI1_TX[1]
FDI1_TX[2]
FDI1_TX[3]
FDI0_FSYNC
FDI1_FSYNC
FDI_INT
FDI0_LSYNC
FDI1_LSYNC
PRDY#
PREQ#
C498
(8) PM_SYNC
R332
C457
(11) H_PWRGOOD
R333
R334
*47P/50V/NPO_4
*0_4S
AM34
PM_SYNC
TCK
TMS
TRST#
TDI
TDO
AP29
AP27
AR26
AR27
AP30
AR28
AP26
XDP_TCLK
R201
XDP_TMS
R200
XDP_TRST#
R335
XDP_TDI_R
R339
XDP_TDO_R
R441
51_4
51_4
51_4
51_4
51_4
+1.05V
+1.05V
C
0.1U/10V/X5R_4
22/J_4
10K/J_4
V8
SM_DRAMPWROK
AP33
UNCOREPWRGOOD
C
PM_DRAM_PWRGD_R
DBR#
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]
AL35
AT28
AR29
AR30
AT30
AP32
AR31
AT31
AR32
XDP_DBRST# (8)
(8) FDI_FSYNC0
(8) FDI_FSYNC1
(8) FDI_INT
(8) FDI_LSYNC0
(8) FDI_LSYNC1
CPU_PLTRST#
R336
R338
43_4
75/J_4
AR33
+1.05V
RESET#
C714
0.1U/10V/X5R_4
Ivy Bridge_rPGA_2DPC_Rev0p61
+1.05V
R328
24.9/F_4
eDP_COMP
A18
A17
B16
C15
D15
C17
F16
C16
G15
C18
E16
D16
F15
eDP_COMPIO
eDP_ICOMPO
eDP_HPD
eDP_AUX
eDP_AUX#
eDP_TX[0]
eDP_TX[1]
eDP_TX[2]
eDP_TX[3]
eDP_TX#[0]
eDP_TX#[1]
eDP_TX#[2]
eDP_TX#[3]
B
eDP
B
+3V_S5
Ivy Bridge_rPGA_2DPC_Rev0p61
R337
1K_4
CPU_PLTRST#
6
2
3
5
PLTRST# (10,18,21,22)
+1.05V
R187
62_4
H_PROCHOT#
H_PROCHOT# (26)
Q21
2N7002DW
+1.5V
+3V_S5
SNB_IVB#:
- It is NC when using Sandy Bridge.(1.05V)
- For next generation processor it will be grounded in package.(1.0V)
(8,16,26,28,30,31,35) ALL_SYS_PWRGD
2
U7
1
74AHC1G09
3
4
R158
130/F_4
PM_DRAM_PWRGD_R
C380
5
0.1U/10V/X5R_4
R157
200/F_4
R202
*100K/F_4
1
1
4
(16) PROCHOT
2
Q10
2N7002
C278
47P/50V/NPO_4
A
3
A
FDI Disabling (Discrete Only)
-FDI_FSYNC (J18/J17/J19/H17) can gang all these
4 signals together and tie them with only one
1K resistor to GND (DG V0.5 Ch2.2.9).
- FDI_INT connect to GND with 1K ohm.
5
(8) PM_DRAM_PWRGD
3
R169
*39
Q7
2
1
*2N7002
MAING (27,28,35)
1.Level 1 Environment-related Substances Should Never be Used.
2.Recycled Resin and Coated Wire should be procured from Green Partners.
3
2
Quanta Computer Inc.
PROJECT : Chief River
Size
Date:
Document Number
SNB/IVB 1/4
Wednesday, February 01, 2012
1
Rev
1A
Sheet
4
of
43
4
5
4
3
2
1
Ivy Bridge Processor (DDR3)
U17C
SA_CK[0]
SA_CLK#[0]
SA_CKE[0]
AB6
AA6
V9
M_A_CLKP0 (14)
M_A_CLKN0 (14)
M_A_CKE0 (14)
(15) M_B_DQ[63:0]
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
C9
A7
D10
C8
A9
A8
D9
D8
G4
F4
F1
G1
G5
F5
F2
G2
J7
J8
K10
K9
J9
J10
K8
K7
M5
N4
N2
N1
M4
N5
M2
M1
AM5
AM6
AR3
AP3
AN3
AN2
AN1
AP2
AP5
AN9
AT5
AT6
AP6
AN8
AR6
AR5
AR9
AJ11
AT8
AT9
AH11
AR8
AJ12
AH12
AT11
AN14
AR14
AT14
AT12
AN15
AR15
AT15
SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]
U17D
SB_CK[0]
SB_CLK#[0]
SB_CKE[0]
AE2
AD2
R9
M_B_CLKP0 (15)
M_B_CLKN0 (15)
M_B_CKE0 (15)
(14) M_A_DQ[63:0]
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
C5
D5
D3
D2
D6
C6
C2
C3
F10
F8
G10
G9
F9
F7
G8
G7
K4
K5
K1
J1
J5
J4
J2
K2
M8
N10
N8
N7
M10
M9
N9
M7
AG6
AG5
AK6
AK5
AH5
AH6
AJ5
AJ6
AJ8
AK8
AJ9
AK9
AH8
AH9
AL9
AL8
AP11
AN11
AL12
AM12
AM11
AL11
AP12
AN12
AJ14
AH14
AL15
AK15
AL14
AK14
AJ15
AH15
05
SB_CK[1]
SB_CLK#[1]
SB_CKE[1]
AE1
AD1
R10
M_B_CLKP1 (15)
M_B_CLKN1 (15)
M_B_CKE1 (15)
D
D
C
B
SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]
SA_CK[1]
SA_CLK#[1]
SA_CKE[1]
AA5
AB5
V10
M_A_CLKP1 (14)
M_A_CLKN1 (14)
M_A_CKE1 (14)
SA_CK[2]
SA_CLK#[2]
SA_CKE[2]
AB4
AA4
W9
SB_CK[2]
SB_CLK#[2]
SB_CKE[2]
AB2
AA2
T9
SA_CK[3]
SA_CLK#[3]
SA_CKE[3]
AB3
AA3
W10
SB_CK[3]
SB_CLK#[3]
SB_CKE[3]
AA1
AB1
T10
SA_CS#[0]
SA_CS#[1]
SA_CS#[2]
SA_CS#[3]
AK3
AL3
AG1
AH1
M_A_CS#0 (14)
M_A_CS#1 (14)
SB_CS#[0]
SB_CS#[1]
SB_CS#[2]
SB_CS#[3]
AD3
AE3
AD6
AE6
M_B_CS#0 (15)
M_B_CS#1 (15)
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY B
SA_ODT[0]
SA_ODT[1]
SA_ODT[2]
SA_ODT[3]
AH3
AG3
AG2
AH2
M_A_ODT0 (14)
M_A_ODT1 (14)
SB_ODT[0]
SB_ODT[1]
SB_ODT[2]
SB_ODT[3]
AE4
AD4
AD5
AE5
M_B_ODT0 (15)
M_B_ODT1 (15)
C
SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]
C4
G6
J3
M6
AL6
AM8
AR12
AM15
M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7
M_A_DQSN[7:0] (14)
SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]
D7
F3
K6
N3
AN5
AP9
AK12
AP15
M_B_DQSN0
M_B_DQSN1
M_B_DQSN2
M_B_DQSN3
M_B_DQSN4
M_B_DQSN5
M_B_DQSN6
M_B_DQSN7
M_B_DQSN[7:0] (15)
SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]
D4
F6
K3
N6
AL5
AM9
AR11
AM14
M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7
M_A_DQSP[7:0] (14)
SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]
C7
G3
J6
M3
AN6
AP8
AK11
AP14
M_B_DQSP0
M_B_DQSP1
M_B_DQSP2
M_B_DQSP3
M_B_DQSP4
M_B_DQSP5
M_B_DQSP6
M_B_DQSP7
M_B_DQSP[7:0] (15)
(14) M_A_BS#0
(14) M_A_BS#1
(14) M_A_BS#2
AE10
AF10
V6
SA_BS[0]
SA_BS[1]
SA_BS[2]
(14) M_A_CAS#
(14) M_A_RAS#
(14) M_A_WE#
AE8
AD9
AF9
SA_CAS#
SA_RAS#
SA_WE#
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]
AD10
W1
W2
W7
V3
V2
W3
W6
V1
W5
AD8
V4
W4
AF8
V5
V7
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_A[15:0] (14)
(15) M_B_BS#0
(15) M_B_BS#1
(15) M_B_BS#2
AA9
AA7
R6
SB_BS[0]
SB_BS[1]
SB_BS[2]
(15) M_B_CAS#
(15) M_B_RAS#
(15) M_B_WE#
AA10
AB8
AB9
SB_CAS#
SB_RAS#
SB_WE#
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]
AA8
T7
R7
T6
T2
T4
T3
R2
T5
R3
AB7
R1
T1
AB10
R5
R4
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_A[15:0] (15)
B
Ivy Bridge_rPGA_2DPC_Rev0p61
Ivy Bridge_rPGA_2DPC_Rev0p61
+1.5V_SUS
A
R170
1K/F_4
R160
(14,15) DDR3_DRAMRST#
(10) DRAMRST_CNTRL_PCH
(16) DRAMRST_CNTRL_EC
R172
R171
*0_4
*0_4S
C161
0.047U/10V_4
R161
4.99K/F_4
Size
1.Level 1 Environment-related Substances Should Never be Used.
2.Recycled Resin and Coated Wire should be procured from Green Partners.
5
4
3
2
A
1K/F_4
3
1
Q8
2N7002
2
CPU_DRAMRST# (4)
Quanta Computer Inc.
PROJECT : Chief River
Document Number
SNB/IVB 2/4
Date:
Wednesday, February 01, 2012
1
Rev
1A
Sheet
5
of
43

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