tip32c.pdf

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TIP32C
Power transistor
Applications
■
.
Linear and swithing industrial equipment
Description
The TIP32C is a silicon Epitaxial-base PNP power
transistor in Jedec TO-220 plastic package. It is
intented for use in medium power linear and
switching applications.
The complementary NPN type is TIP31C.
1
2
3
TO-220
Internal schematic diagram
Order codes
Part number
TIP32C
Marking
TIP32C
Package
TO-220
Packing
Tube
November 2006
Rev 2
1/8
www.st.com
8
Absolute maximum ratings
TIP32C
1
Absolute maximum ratings
Table 1.
Symbol
V
CBO
V
CEO
V
EBO
I
C
I
CM
I
B
P
TOT
T
stg
T
J
Absolute maximum ratings
Parameter
Collector-base voltage (I
E
= 0)
Collector-emitter voltage (I
B
= 0)
Emitte-base voltage (I
C
= 0)
Collector current
Collector peak current (t
P
< 5ms)
Base current
Total dissipation at T
case
= 25°C
T
amb
= 25°C
Storage temperature
Max. operating junction temperature
Value
-100
-100
-5
-3
-5
-1
40
2
-65 to 150
150
Unit
V
V
V
A
A
A
W
W
°C
°C
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TIP32C
Electrical characteristics
2
Electrical characteristics
(T
case
= 25°C; unless otherwise specified)
Table 2.
Symbol
I
CEO
I
CES
I
EBO
V
CEO(sus
(1)
Electrical characteristics
Parameter
Collector cut-off current
(I
B
= 0)
Collector cut-off current
(V
BE
= 0)
Emitter cut-off current
(I
C
= 0)
Collector-emitter
sustaining voltage
(I
B
= 0)
Collector-emitter
saturation voltage
Test Conditions
V
CB
=-60V
V
CB
=-100V
V
EB
=-5V
Min.
Typ.
Max.
-0.3
-0.2
-1
Unit
mA
mA
mA
I
C
= -30mA
-100
V
V
CE(sat)(1)
I
C
= -3A
_
I
C
= -3A_
I
C
= -1A
I
C
= -3A
_
I
B
= 375mA
V
CE
=-4V
V
CE
=-4V
V
CE
=-4V
25
10
-1.2
-1.8
50
V
V
V
BE(on)(1)
Base-emitter voltage
h
FE(1)
DC current gain
1. Pulsed duration = 300 ms, duty cycle
≥1.5%.
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Electrical characteristics
TIP32C
2.1
Typical characteristic
Figure 1.
Safe operating area
Figure 2.
Derating Curves
Figure 3.
DC current gain
Figure 4.
Collector-emitter saturation
voltage
Figure 5.
Base-emitter saturation
voltage
4/8
TIP32C
Package Mechanical Data
3
Package Mechanical Data
In order to meet environmental requirements, ST offers these devices in
ECOPACK® packages. These packages have a Lead-free second level
interconnect . The category of second level interconnect is marked on the
package and on the inner box label, in compliance with JEDEC Standard JESD97.
The maximum ratings related to soldering conditions are also marked on the inner
box label. ECOPACK is an ST trademark. ECOPACK specifications are available
at: www.st.com
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