ARMv1 ISA
Mnemonic
Syntax
Description
Action
Movement InstructionsMovement instructions move data between registers and operands.
MOV
MOV<cond>{S} Rd, #imm
Move value immed
Rd = immed
MOV<cond>{S} Rd, Rm{, <shift>}
Move value
Rd = Shift(Rm)
MVN
MVN<cond>{S} Rd, #imm
Move NOT value immed
Rd = ¬immed
MVN<cond>{S} Rd, Rm{, <shift>}
Move NOT value
Rd = ¬Shift(Rm)
Load InstructionsLoad instructions move the content of memory addresses into registers.
LDM
LDM<cond><type> Rn{!}, <reglist>{^}
Load multiple
addr = Rnfor each Rd in {reglist}: Rd = [addr] update address based on {type}
LDR
LDR<cond>{B} Rd, [Rn{, #imm}]{!}
Load register immed
Rd = [Rn + imm]If !: Rn = Rn + imm
LDR<cond>{B} Rd, [Rn, Rm{, <shift>}]{!}
Load register
Rd = [Rn + Shift(Rm)]If !: Rn = Rn + Shift(Rm)]
LDR<cond>{B}{T} Rd, [Rn], #imm
Load register, post index
Rd = [Rn]Rn = Rn + imm
LDR<cond>{B}{T} Rd, [Rn], Rm{, <shift>}
Rd = [Rn]Rn = Rn + Shift(Rm)
Store InstructionsStore instructions moves the values from registers into memory.
STM
STM<cond><type> Rn{!}, <reglist>{^}
Store multiple
addr = Rnfor each Rd in {reglist}: [addr] = Rd update address based on {type}
STR
STR<cond>{B} Rd, [Rn{, #imm}]{!}
Store register immed
[Rn + imm] = RdIf !: Rn = Rn + imm
STR<cond>{B} Rd, [Rn, Rm{, <shift>}]{!}
Store register
[Rn + Shift(Rm)] = RdIf !: Rn = Rn + Shift(Rm)]
STR<cond>{B}{T} Rd, [Rn], #imm
Store register, post index
[Rn] = RdRn = Rn + imm
STR<cond>{B}{T} Rd, [Rn], Rm{, <shift>}
[Rn] = RdRn = Rn + Shift(Rm)
Arithmetic InstructionsArithmetic instructions perform basic mathematical operations on two operands.
ADC
ADC<cond>{S} Rd, Rn, #imm
Add and carry immed
Rd = Rn + imm + C
ADC<cond>{S} Rd, Rn, Rm{, <shift>}
Add and carry
Rd = Rn + Shift(Rm) + C
ADD
ADD<cond>{S} Rd, Rn, #imm
Add immed
Rd = Rn + imm
ADD<cond>{S} Rd, Rn, Rm{, <shift>}
Add
Rd = Rn + Shift(Rm)
RSB
RSB<cond>{S} Rd, Rn, #imm
Reverse subtract immed
Rd = imm − Rn
RSB<cond>{S} Rd, Rn, Rm{, <shift>}
Reverse subtract
Rd = Shift(Rm) − Rn
RSC
Reverse subtract with carry immed
Rd = imm − Rn − ¬C
Adi67