AT90SC3232.pdf

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Features
General
•
High-performance, Low-power AVR
®
(AVR2 Core) Enhanced RISC Architecture
•
•
•
•
•
•
– 120 Powerful Instructions (Most Executed in a Single Clock Cycle)
Low-power Idle and Power-down Modes
Bond Pad Locations Conforming to ISO 7816-2
ESD Protection to ± 6000V
Operating Ranges: from 2.7V to 3.3V and 4.5V to 5.5V
Compliant with GSM, 3GPP and EMV 2000 Specifications; PC Industry Compatible
Available in Wafers, Modules and Industry-standard Packages
Memory
•
32K Bytes of Flash Program Memory
– Endurance: 10,000 minimum Write/Erase Cycles
•
32K Bytes of EEPROM, Including 64-byte OTP Area and 64-byte Bit-addressable Area
– 1 to 128-byte Program/Erase
– 2 ms Program, 2 ms Erase
– Typically More than 500,000 Write/Erase Cycles
– 10 Years Data Retention
•
1.5K Bytes RAM
Secure
Microcontroller
for Smart Cards
AT90SC3232
Summary
Peripherals
•
I/O Port
– Configurable to Support Communication Protocols Including ISO 7816-3
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16-bit Timer
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Random Number Generator (FIPS 140-1)
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2-level, 4-vector Interrupt Controller
Security
•
•
•
•
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Advanced Protection Against Physical Attack
Environmental Protection Systems
Voltage Monitor
Frequency Monitor
Secure Memory Management/Access Protection (Supervisor Mode)
Development Tools
•
Hardware Development Support on the Smart Card Development Kit (SDK)
Description
The AT90SC3232 is a low-power, high-performance, 8-bit microcontroller with Flash
Program memory and EEPROM Data memory, based on the AVR enhanced RISC
architecture. By executing powerful instructions in a single clock cycle, the
AT90SC3232 achieves throughputs close to 1 MIPS per MHz. Its Harvard architecture
includes 32 general-purpose working registers directly connected to the ALU, allowing
two independent registers to be accessed in one single instruction executed in one
clock cycle.
The AT90SC3232 includes 64K bytes of Atmel’s high density, nonvolatile memory. The
on-chip downloadable Flash allows the Program memory to be reprogrammed in-sys-
tem. This technology combined with the versatile 8-bit CPU on a monolithic chip
provides a highly flexible and cost-effective solution to many smart card applications.
Rev. 1316DS–10/01
Note: This is a summary document. A complete document will be
1
available under NDA. For more information, please contact your
local Atmel sales office.
Figure 1.
The AT90SC3232 AVR Enhanced RISC Architecture
Data Bus
8-bit
OTP
EEPROM
User Memory
Flash
Program
Memory
16
Instruction
Register
16
ALU
Instruction
Decoder
16
Control
Lines
Status
Register
8
8
General
Purpose
Registers
x
y
z
Access
Control
Random
Number
Generator
PC
Access
Control
RAM
Data Memory
V
CC
8
Interrupt
Unit
ISO 7816
I/O Port
Timer
Secure
Control
GND
CLK
IN/OUT
© Atmel Corporation 2001.
Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Com-
pany’s standard warranty which is detailed in Atmel’s Terms and Conditions located on the Company’s web site. The
Company assumes no responsibility for any errors which may appear in this document, reserves the right to change
devices or specifications detailed herein at any time without notice, and does not make any commitment to update the
information contained herein. No licenses to patents or other intellectual property of Atmel are granted by the Com-
pany in connection with the sale of Atmel products, expressly or by implication. Atmel’s products are not authorized for use as critical compo-
nents in life support devices or systems.
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Printed on recycled paper.
1316DS–10/01
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