PCA8581.PDF

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INTEGRATED CIRCUITS
DATA SHEET
PCA8581; PCA8581C
128
×
8-bit EEPROM with I
2
C-bus
interface
Product specification
Supersedes data of July 1994
File under Integrated Circuits, IC12
1996 Aug 19
Philips Semiconductors
Philips Semiconductors
Product specification
128
×
8-bit EEPROM with I
2
C-bus interface
FEATURES
•
Operating supply voltage:
– 4.5 to 5.5 V (PCA8581)
– 2.5 to 6.0 V (PCA8581C)
•
Integrated voltage multiplier and timer for writing
(no external components required)
•
Automatic erase before write
•
Low standby current; maximum 10
µA
•
8-byte page write mode
•
Serial input/output bus (I
2
C-bus)
•
Address by 3 hardware address pins
•
Automatic word address incrementing
•
Designed for minimum 10000 write cycles per byte
•
10 years minimum non-volatile data retention
•
Infinite number of read cycles
•
Pin and address compatibility to PCF8570, PCF8571
and PCF8582
•
Operating temperature:
−25
to +85
°C.
PCA8581; PCA8581C
GENERAL DESCRIPTION
The PCA8581 and PCA8581C are low power CMOS
EEPROMs with standard and wide operating voltages:
4.5 to 5.5 V (PCA8581)
2.5 to 6.0 V (PCA8581C).
In the following text, the generic term ‘PCA8581’ is used to
refer to both types in all packages except when otherwise
specified.
The PCA8581 is organized as 128 words of 8-bytes.
Addresses and data are transferred serially via a two-line
bidirectional bus (I
2
C-bus). The built-in word address
register is incremented automatically after each written or
read data byte. All bytes can be read in a single operation.
Up to 8 bytes can be written in one operation, reducing the
total write time per byte. Three address pins, A0, A1 and
A2 are used to define the hardware address, allowing the
use of up to 8 devices connected to the bus without
additional hardware.
QUICK REFERENCE DATA
SYMBOL
V
DD
PARAMETER
supply voltage
PCA8581
PCA8581C
I
DD
T
amb
T
stg
supply current (standby)
operating ambient temperature
storage temperature
with EEPROM retention
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
PINS
PCA8581P
PCA8581CP
PCA8581T
PCA8581CT
8
8
8
8
PIN POSITION
DIP
DIP
SO8
SO8
MATERIAL
plastic
plastic
plastic
plastic
CODE
SOT97-1
SOT97-1
SOT96-1
SOT96-1
f
SCL
= 0 Hz
4.5
2.5
−
−25
without EEPROM retention
−65
−65
5.5
6.0
10
+85
+150
+85
V
V
µA
°C
°C
°C
CONDITIONS
MIN.
MAX.
UNIT
1996 Aug 19
2
Philips Semiconductors
Product specification
128
×
8-bit EEPROM with I
2
C-bus interface
BLOCK DIAGRAM
PCA8581; PCA8581C
handbook, full pagewidth
TIMER
VOLTAGE
MULTIPLIER
PCA8581
PCA8581C
WORD
ADDRESS
REGISTER
A0
A1
A2
SCL
SDA
5
1
2
3
6
INPUT
FILTER
I C BUS
CONTROL
2
7
ROW
SELECT
MEMORY
CELL
ARRAY
COLUMN
SELECT
MULTIPLEXER
VDD
VSS
TEST
8
POWER
ON
RESET
SHIFT
REGISTER
8
R/W
CONTROL
4
7
MLB887
Fig.1 Block diagram.
PINNING
SYMBOL
A0
A1
A2
V
SS
SDA
SCL
TEST
V
DD
PIN
1
2
3
4
5
6
7
8
DESCRIPTION
hardware address input 0
hardware address input 1
hardware address input 2
negative supply
serial data input/output
serial clock input
test output can be connected to V
SS
, V
DD
or left
open-circuit
positive supply
lfpage
A0
A1
A2
VSS
1
2
3
4
MLB888
8
VDD
TEST
SCL
SDA
PCA8581
PCA8581C
7
6
5
Fig.2 Pin configuration.
1996 Aug 19
3
Philips Semiconductors
Product specification
128
×
8-bit EEPROM with I
2
C-bus interface
CHARACTERISTICS OF THE I
2
C-BUS
The I
2
C-bus is for bidirectional, two-line communication
between different ICs or modules. The two lines are a
serial data line (SDA) and a serial clock line (SCL). Both
lines must be connected to a positive supply via a pull-up
resistor. Data transfer may be initiated only when the bus
is not busy.
Bit transfer
PCA8581; PCA8581C
One data bit is transferred during each clock pulse. The
data on the SDA line must remain stable during the HIGH
period of the clock pulse as changes in the data line at this
time will be interpreted as a control signal.
SDA
SCL
data line
stable;
data valid
change
of data
allowed
MBA607
Fig.3 Bit transfer.
Start and stop conditions
Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW transition of the data line, while the
clock is HIGH is defined as the start condition (S). A LOW-to-HIGH transition of the data line while the clock is HIGH is
defined as the stop condition (P).
SDA
SDA
SCL
S
start condition
P
stop condition
SCL
MBA608
Fig.4 Definition of start and stop conditions.
1996 Aug 19
4
Philips Semiconductors
Product specification
128
×
8-bit EEPROM with I
2
C-bus interface
System configuration
PCA8581; PCA8581C
A device generating a message is a ‘transmitter’, a device receiving a message is the ‘receiver’. The device that controls
the message is the ‘master’ and the devices which are controlled by the master are the ‘slaves’.
SDA
SCL
MASTER
TRANSMITTER /
RECEIVER
SLAVE
TRANSMITTER /
RECEIVER
MASTER
TRANSMITTER /
RECEIVER
MBA605
SLAVE
RECEIVER
MASTER
TRANSMITTER
Fig.5 System configuration.
Acknowledge
The number of data bytes transferred between the start
and stop conditions from transmitter to receiver is
unlimited. Each byte of eight bits is followed by an
acknowledge bit. The acknowledge bit is a HIGH level
signal put on the bus by the transmitter during which time
the master generates an extra acknowledge related clock
pulse. A slave receiver which is addressed must generate
an acknowledge after the reception of each byte. Also a
master receiver must generate an acknowledge after the
reception of each byte that has been clocked out of the
slave transmitter.
The device that acknowledges must pull down the SDA
line during the acknowledge clock pulse, so that the SDA
line is stable LOW during the HIGH period of the
acknowledge related clock pulse (set-up and hold times
must be taken into consideration). A master receiver must
signal an end of data to the transmitter by not generating
an acknowledge on the last byte that has been clocked out
of the slave. In this event the transmitter must leave the
data line HIGH to enable the master to generate a stop
condition.
handbook, full pagewidth
START
condition
SCL FROM
MASTER
1
2
8
clock pulse for
acknowledgement
9
DATA OUTPUT
BY TRANSMITTER
S
DATA OUTPUT
BY RECEIVER
MBA606 - 1
Fig.6 Acknowledgement on the I
2
C-bus.
1996 Aug 19
5

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