Clearpoint_Q-RAM-22B_User_Information_Manual.pdf

(632 KB) Pobierz
CLEARPOINT
INC.
Q-RAM22B
USER INFORMATION
MANUAL
1OS
South Street
Hopkinton, MA 01748
(S1 7)
435-5395
Telex: 298281
TABLE OF CONTENTS
CHAPTER 1 - GENERAL DESCRIPTION AND SPECIFICATIONS
1.1
1.2
1.3
1.4
Introduction •••••••••••••••••••••••••••••••••••••• l-l
General Description ••••••••••••••••••••••••••••••• 1-2
Backplane Pin Utilization ••••••••••••••••••••••••• 1-4
Specifications •••••••••••••••••••••••••••••••••••• 1-6
r
CHAPTER 2 - HARDWARE INSPECTION, INSTALLATION, AND CHECKOUT
2.1
2.2
2.3
2.4
2.5
2.6
2.7
Introduction •••••••••••••••••••••••••••••••••••••• 2-l
Configuring the Q-RAM 22(B) Program Plugs ••••••••• 2-l
Addressing Options •••••••••••••••••••••••••••••••• 2-l
Board Size Configuration Plugs •••••••••••••••••••• 2-3
CSR Option Plug Configurations •••••••••••••••••••• 2-3
Battery Backup Option Plugs ••••••••••••••••••••••• 2-4
Installation Procedure •••••••••••••••••••••••••••• 2-S
CHAPTER 3 - CSR DESCRIPTION
3.1
3.2
Introduction •••••••••••••••••••••••••••••••••••••• 3-l
CSR Bit Assignment •••••••••••••••••••••••••••••••• 3-l
FIGURES
Figure 1
Figure 2
Program Plug Description ••••••••••••••••••••• 1-2
Q-RAM 22(B) •••••••••••••••••••••••••••••••••• 1-3
i
TABLES
Table
Table
Table
Table
Table
Table
Table
Table
1
2
3
4
5
6
7
8
Q-RAM 22(B} Products •••••••••••••••••••••••••• l-l
Backplane Power Pins •••••••••••••••••••••••••• 1-4
Backplane I/O Signal Pins ••••••••••••••••••••• 1-5
Multiple Q-RAM 22(B} Starting Addresses ••••••• 2-2
Memory Size Jumpers ••••••••••••••••••••••••••• 2-3
CSR Address Selection ••••••••••••••••••••••••• 2-4
Battery Backup Mode Options ••••••••••••••••••• 2-4
CSR Bits 5 to 11 ••••••••••••••••••••••••••••••
3-3
APPENDIXES
Appendix A
Appendix B
Appendix C
Memory Starting Address Chart •••••••••••••• A-l
Bank Selection ••••••••••••••••••••••••••••• B-l
Q-RAM 22B Block Mode DMA Memory Board •••••• C-l
ii
CHAPTER 1
GENERAL DESCRIPTION AND
SPECIFICA~IONS
1.1
INTRODUCTION
This manual supplies user information for the Q-RAM
22(B) family of memory modules. Q-RAM 22(B) modules (see
Table 1) provide high density, low cost per bit storage for
systems which utilize the Digital Equipment Corporation
(hereafter referred to as DEC*) Q-BUS.
64K MOS RAMS are
used as individual storage devices to provide up to 1 mbyte
on a single quad-height board. Features available on Q-RAM
22(B) are:
- Up to 1
MB
memory capacity
- Jumper selectable 18 or 22(B) bit addressing
- Parity generation and checking on board
Complete
DEC software-hardware
compatible,'
parity control and status register on board
locatable at any of 8 assigned I/O page address
- Battery back-up support
- Single 5 volt power supply
address programmable at
any 64K
- Starting
boundary
- Parity error LED provides visual indication of
board failure
Table-l
Q-RAM Products
Description
Designation
1
MB
board with parity
Q-RAM 22 (B)
1
MB
boar.d no parity
Q-RAM 22(B)-1
512 KB board with parity
Q-RAM 22(B)-2
512 KB board no parity
Q-RAM 22(B)-3
*Registered trademark of Digital Equipment Corporation
1-1
1.2
GENERAL DESCRIPTION
The a-RAM 22(B) is a single quad-height memory module
which interfaces to the LSI-II a-BUS.
All timing and
control logic for the memory, refresh circuitry, parity
control, and status register are contained on board.
The MOS memory array consists of up to eight rows of
65,536 X 1 bit dynamic RAM devices with 18 devices per row.
Each row will accept 65,536 18 bit words consisting of
(two) eight bit bytes and two parity bits (one per byte).
Circuitry for refresh of the MOS memory devices is provided
on board and operates transparently to the user.
The a-RAM
22(B)
module's
starting
address is
selectable using program plugs PO to P4 (see figure 1 and
2) to any 64K boundary within the
Q~BUS
22 or 18 bit
address space. Program plug P7 is used to select 18 bit or
22 bit addressing. BDAL 18, BDAL 19, BDAL 20, and BDAL 21
are ignored if 18 bit addressing is selected.
The module will not respond to BBS7 transfers to allow
the top 4K addresses to be reserved for I/O peripherals.
P8 is provided on board which allows the user to reclaim 2K
of the I/O page for system memory (see figure 2).
FIGURE
1
PROGRAM
PLUG
DESCRIPTION
OUT
OFF
When holding board fingers down, program plugs positioned
to left are defined as "ON". Those positioned to right are
"OFF".
ON
1-2

Plik z chomika:

Inne pliki z tego folderu:

Inne foldery tego chomika:

Zgłoś jeśli naruszono regulamin