V100_schematics.pdf
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V100 -
RF
SCHEMATICS
RX SIGNAL PATH
TX SIGNAL PATH
MAIN VCO SIGNAL PATH
TUNING VOLTAGES
13 MHz REFERENCE CLOCK
DATA BUS
ADDRESS BUS
REFERENCE SIGNALS
RX275
J1
SH1
TEXT
SH2
SH3
SH4
RX275_GSM
TX275
RX275_GSM
RVCO_275
*DCS_SEL
*GSM_SEL
35
70
SH5
SH6
SH7
34
69
Q1101
*DCS_SEL
Q1100
*PCS_SEL
RX_ACQ
33
V1
-10V
68
32
67
942.5Mhz
FL401
DM_CS
31
66
Q450
FL400
942,5MHz
TX_GSM
TX_DCS
RVC0_DCS
RVC0_PCS
GP05 GP04
RX_EN
30
V1_SW
65
29
64
Q400
SAW FILTER
28
FL457
400Mhz
SF_OUT
27
STBY_DL
63
62
GSM MIXER
Q480
-10V
-5V
BRSR
26
TX_KEY
61
25
60
Q1102
DIPLEXER
FILTERED_-10V
FILTERED_-5V
RVCO_275
BDR
24
TX_EN
59
23
58
BCLKR
TP865
22
-5V
57
21
56
ISO AMP
BCLKX
RX275_DPCS
RX275_DPCS
RVCO_PCS
BDX
18
53
20
VREF
55
DCS_PCS MIXER
19
54
MQSPI_CLK1
17
52
FL2400
DCS_PCS SWITCH
1960Mhz
MQSPI_CS1
16
51
FL1401
1897Mhz
Q450
U400
Q1400
RF_V1
MAGIC_13Mhz
CLK_SELECT
15
50
14
DX1
49
13
48
12
47
TP867
11
MAGIC_13Mhz
46
1842.8Mhz
FL1400
CLK_SELECT
RVC0_DCS
TX_KEY
DM_CS
MQSPI_CS1
MQSPI_CLK1
DX1
BDX
B+
B+
B+
10
45
9
44
RF_V1
Q202
DCS_PCS LNA
V1_SW
BCLKX
Q201
RF_V2
B+
B+
B+
B+
8
43
7
42
6
41
TP866
5
40
RVCO_275
VREF
B+
B+
4
39
3
38
J3
RX_ACQ
BDR
BFSR
BCLKR
GP05
GP04
B+
B+
2
37
1
36
Q203
RF_V1
U200
MAGIC IC
RF_V2
Y200
SF_OUT
71
72
Q252
RF SWITCH
V1_SW
V1_FILT
V1_FILT
RX275_DCS
RX275_GSM_PCS
RF_V2
U150
Q360
TX_EN
RX VCO
U250
RVCO_275
RF_V1
U360
U151
RX_EN
FILTERED_-5V
RVCO_DCS
RVCO_PCS
*GSM_SEL
RF_V1
TP864
TX_EN
DM_CS
Q361
Q361
*DCS_SEL
J2
RF_V2
*PCS_SEL
RF_V2
*GSM_SEL
RX275
RX275_GSM
RX275_DCS
Q100
RX_EN
EXCITER
B+
POWER AMPLIFIER
TX275
STBY_DL
Q112
Q910
*DCS_SEL
Q110
Q2101
RX275_GSM_PCS
TX_GSM
SF_OUT
RF CONTROL
TX_DCS
TX_DCS
TX275_DPCS
U300
Q331
*GSM_SEL
TX_DCS
Q2102
RX275_DPCS
U350
Q330
TX275_GSM
RX CONTROL
TX CONTROL
SF_OUT
RF_V2 TX275
*GSM_SEL
TX275_GSM
TX_GSM
Q121
TX VCO
TX275
Q2120
TX_EN
TX275_DPCS
GATE CONTROL
Q372
TX275
B+
P.A. DRAIN CONTROL
Q380
TX GSM
PA_B+
DM_CS
Q120
Q120
Q121
PA_B+
Q373
U390
SAT_DETECT
DET_SW
TX_KEY_OUT
PA_B+
TX275
TX275
Q370
Q372
FILTERED_-5V
Q381
Q370
Q371
DM_CS
U391
Q371
P.A. CONTROL
V100 - AL SCHEMATICS
V2
EXT_CHRG_EN
TMS
GND
TDO
TRST*
VCC_MEMIF
VCCA
VDDS
VDD
-5V
V1
-10V
Q600
SVENO SIM_RX
RSTO
URXD
CLKO SIM_TX
UTXD
SIMPD
EMU1
TDI
TCK
V2
EMUO
RESET
U903
U904
RS232_TX (WAS SCI_TX)
RS232_TX (WAS SCI_RX)
CE0 CE3 CE4
CE1 R_W CE2
CE5
BCLKR
VDDS
BDR
BFSR
CE8
VRVA_INT
DP_EN_L
BCLKX
INT_CS
TDO
EMU1
TCK
TRST*
TDI
TMS
EMUO
CLK_SELECT
VDD
BDX
VDD
ADDRESS(21:0)
V2
V2
SR_VCC
A20
A0
VDD
STBY_DL
EXT_CHRG_EN
VREF
U906
CR912
CLK_AM_FM
MO_ST
STEREO_HEAD_INT
TX_KEY TX_EN
DM_CS
RX_EN
RX_ACQ
EXT_B+
KBR3
DIG_AUD(3:0)
CR600
VCC_MEMIF
Q911
MAN_TEST_AD
U701
FLASH
EPROM
VCC_MEMIF
RESET
U702
SRAM
J600
V2
MO_ST
BATT_FDBK
V2
MAN_TEST
RS232_TX
RS232_RX
RS232_EN
ON/OFF
UPLINK
DOWNLINK
DSC_EN
MAN_TEST_AD
V1
INTR_OUT1
V1_SW
V2
INTR_OUT2
KBR4
KBR3
KBR2
KBR1
KBR0
VDDS
BKLT_EN
KBC4
KBC3
KBC2
KBC1
KBC0
VCCA
DSC_TXD
DSC_RXD
RFI
RCLOCK
U800
V2
SR_CS
VIB_EN
VDD
VCC_MEMIF
MAGIC_13MHz
Q800
DSC_EN_AD
Q800
CHRG_EN
DATA(15:0)
EXT_B+
DCABLE_INT
V2
STBY_DL
ENABLE_FM
FM_PILOT3
FM_PILOT2
FM_PILOT1
FM_PILOT0
DATA_AM_FM
Q810
BATT_THERM_AD
BATT_SER_DATA
V2
V1_SW
LED_RED
LED_GREEN
VRVA_INT
J1
DOWNLINK_AD
UPLINK
STBY_DL
V2
BATT+
Q912
DCABLE_INT
HEAD_INT_L
DSP_CLK_OUT
DBGACK
IRQ
FIQ
TSIZE
TSTROBE*
VDDS
MQSPI_CS2
RW_AM_FM
-5V_EN
Hookswitch_INT
VCC_MEMIF
VDD
VDD
TSTATE0
TSTATE1
TSTATE2
MCLK
VDD
Q913
RX_ACQ
V1
-10V
J604
Q914
V2
MIDRATE_1
MIDRATE_2
TEST_ENH
DM_CS
V1_SW
RX_EN
VDDS
STBY_DL
CR603
MAN_TEST_AD
DOWNLINK_AD
DSC_EN_AD
BATT_THERM_AD
FM_RSSI
B+_FREAK
VSIM1
V1
DR2
DX2
MQSPI_CLK2
MQSPI_CS0
V2
RTC_BATT+
GCLK
B+
V3
IRQ_1
RESET
MAGIC_QSPI(3:0)
GCAP_MQSPI(3:0)
B+
VDDS
DR1
DX1
MQSPI_CLK1
MQSPI_CS1
VCC_MEMIF
V2
BFSR
TX_KEY
V2
VDD
V3
BDR
TX_EN
Q905
BATT+
DIG_AUD(3:0)
32,768MHz
V_BOOST1
Y900
VCCA
BCLKR
-5V
Q908
PWR_SW
V_BOOST1
CR902
WDOG
BCLKX
EXT_B+
VREF
V1
Q905
CR903
B+
Q901
BATT+
CHRG_EN
Q902
BATT_FDBK
BDX
MQSPI_CLK1
DX1
MAGIC_13MHz
GCAP_CLK
VCLK
VDR
VDX
VFSRX
SR_CS
SR_VCC
V2
Q900
Q904
MIDRATE_1
EXT_B+
MQSPI_CS1
CLK_SELECT
U900
GCAP II
B+
BATT+
MIDRATE_2
Q909
Q909
B+
VREF
ALRT_VCC
VAG
B+
B+
B+
B+
B+
B+
VSIM1
Q903
FM_SPKR-
FMin
J504
STBY_DL
VAG
V2
B+
V2
ALRT_OUT
J803
SIM_BLOCK
VSIM1
B+
B+
B+
B+
CR900
SPKR-
HEAD_INT_L
ON_2
U901
RTC_BATT+
HEADSET_L
VR901
SPKR-
SIM_TX
SIM_RX
TEXT
RX SIGNAL PATH
TX SIGNAL PATH
MAIN VCO SIGNAL PATH
TUNING VOLTAGES
13 MHz REFERENCE CLOCK
DATA BUS
ADDRESS BUS
REFERENCE SIGNALS
V100 -
BOARD LAYOUT
- PAGE 1/2
V100 -
BOARD LAYOUT
- PAGE
2/2
V100 - CONNECTOR SCHEMATICS
Plik z chomika:
mmaacckkii
Inne pliki z tego folderu:
V100_schematics.pdf
(3340 KB)
v100_level3_service_manual.pdf
(5742 KB)
Sm_v100.pdf
(2480 KB)
Disass_V100.PDF
(4924 KB)
Diff_Camelot.PDF
(11 KB)
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